The present invention relates to devices for the quality control of complex printed circuits and in particular those obtained in so-called "hybrid" industrial technology; these circuits, which are generally very compact, being constituted by multiple superposed layers of insulating material comprising a more or less high density of branched conductor elements.
Applicants previously disclosed in French Patent Application No. 2 521 305 the method and means for effecting quality control of the galvanic insulation which must normally exist between the different conductor elements--or "trees"--of such a type of multi-layer printed circuits.
Like the quality control of the insulation, that of the continuity is essentially dictated by economy aiming at revealing at an early stage the defective elements in a production process of which the cost increases very quickly at each successive stage of manufacture.
It is therefore an object of the present invention to provide a method complementary of the preceding one which, thanks to similar means arranged in specific manner, makes it possible to effect quality control of electrical continuity which the multiple equipotential branchings of each of the "trees" constituting the whole of the conductor network of the multi-layer printed circuits must normally present.
Accordingly, it is generally assumed that the assembly E of the metallic "chips" accessible on at least one outer face of a printed circuit of a determined technological model is normally constituted by a first sub-assembly Ei comprising only one "chip" belonging to each of the equipotential "trees" of the printed circuit to be controlled and by a second sub-assembly Ec comprising all the other "chips" of the circuit, with E=Ei+Ec.
It may therefore be concluded that the control of the continuity of the whole of the conductor network of a printed circuit is equivalent to testing the quality of the electrical connection having to exist between each "chip" of the sub-assembly Ec belonging to a given tree and the "chip" of the assembly Ei belonging to the same "tree". In other words, assuming that all the "chips" Ei are connected to a common conductor, the quality control is accomplished by the test of continuity between each of the dots of the assembly Ec and the conductor common to the assembly Ei.
One refinement of the method consists in considering that the sub-assembly Ec is itself constituted by two sub-assemblies such that Ec=Eci+Ece, Ece being the sub-assembly constituted by all the "chips" having the property of being ends of "trees", this particularly then allowing a complete test of continuity to be made between each of the "chips" of Ece and the conductor common to Ei.
Thus, with the same industrial preoccupations as those which motivated the Patent Application mentioned above, the present invention has for its object a device for effecting quality control of the electrical continuity of the conductor network of multi-layer printed circuits of various types and configurations--including the most compact resulting from so-called "hybrid" technology--which does not have the drawbacks of the known systems employing in particular different sets of sensors with tips.